Actually, it makes sense; I posted about the EtherREGEN’s External Clocking circuitry awhile back. Here’s the key paragraph;
Well, the EtherREGEN uses the Microchip Gigabit Ethernet Switch chip (KS9897S), which requires a 25MHz clock, not 10MHz. So, that ultra precise external 10MHz clock input (that some folks connect to a multi-$1,000 Rubidium Atomic Clock), has to get multiplied/divided by a $20 Silicon Labs clock generator chip (Si5340B), dramatically negating any supposed “phase-noise reduction” properties of the EtherREGEN
In other words, regardless of whether it’s the NS3, or even a PERF10, any external 10MHz clock will be “bottlenecked” by [that] Silicon Labs clock divider inside the EtherREGEN, possibly resulting in a worse performance.
Not to mention this whole notion of re-clocking when the EtherREGEN already has a perfectly competent ultra-low phase-noise Crystek CCHD-5575-25 (the internal 25MHz Crystal) is totally nuts. 