Phase noise is a rather complex one and difficult to explain here, but in essence how much of an impact it actually has on the Master Clock output is dependent on the type of PLL used in the Master Clock. If it uses a fast acting, tight loop, the quality of the Master Clock output is very dependent on the characteristics of the reference clock input. In this case, factors like phase noise become very relevant, as they will have a direct impact on the Master Clock output.
On the other hand, you may have a slower acting loop where factors like jitter are much more dependant on the local oscillator inside the Master Clock, but as a result the loop is less susceptible to inducing jitter from the reference clock signal. dCS products use this type, with a slower acting PLL. What this means is that if you are feeding a reference clock into the Vivaldi Clock, phase noise isn’t really an issue as short term issues like this are averaged out over time.
Not quite, although I can see where you are coming from. Low phase error is always better than high phase error, but low phase error with dither is better than low phase error without dither.
It is also worth noting that the dCS PLLs in testing do not exhibit this dead-zone, but listening tests to clock dither show that it does provide an audible improvement.
Correct, and we also filter it out before the final output of the clock signal so there is no trace of it on the actual clock output.
Technically we do publish these. The accuracy spec is jitter over time. It shows how many parts per million, or ppm, the clock output is. As far as I am aware this is an industry standard measurement so should give a good indication of one clock’s jitter and stability against another. The guaranteed accuracy of above +/-1ppm for our current Master Clocks is over a temperature range of 10°C to 30°C, so you have that accuracy against both time and temperature factors.
On the 10MHz clock topic… One thing I would like to point out (which I am sure many on this thread are aware of, just to add to the collective knowledge here) is that a 10mHz clock signal is not inherently better than a clock signal generated by a dCS Master Clock. Conversely, if you are generating a clock signal specifically for use in audio products, it makes far more sense to use a direct multiple of the signal you are clocking, in audio being direct multiples of 44.1kHz and 48kHz. We use clocks centered at 22.5792MHz and 24.576MHz. These rates are 2^9 of the base frequencies, meaning this rate can easily be divided down to the audio rates in powers of 2. 10MHz master clocks use rate multipliers to convert to digital audio rates, which generate more jitter and tend to have a dirtier spectrum. As far as I have ever been able to find out, the reason 10mHz is prevalent in clocking is likely historical and due to it simply being a round number. No real rationale for audio purposes, unlike the rates we use.